1) Field of the Invention
The present invention relates to an amplitude modulation (AM) demodulation circuit using a phase locked loop (PLL) in various aspects of an integrated circuit.
2) Description of the Related Art
FIG. 12 is a block diagram that shows an example of construction of a conventional AM demodulation circuit using a PLL. An operation of the AM demodulation circuit will be explained below with reference to FIG. 12. An input signal is input to an AM detector 1. In the AM detector 1, waveform detection is performed by multiplying the input signal and an AM detection reference signal obtained by shifting an output of a voltage control oscillator (VCO) 6 by +45 degrees by means of a phase shift circuit 4. A low-pass filter 7 removes a harmonic component from the detected waveform and outputs the detected waveform (xe2x80x9cdetection outputxe2x80x9d). The oscillation frequency of the VCO 6 is determined by a PLL (xe2x80x9cAPC loopxe2x80x9d) formed by the VCO 6, an automatic phase control (APC) detection circuit, an APC filter 3, and a phase shift circuit 5. The APC detection circuit 2 compares the input signal with a signal obtained by shifting the output of the VCO 6 by xe2x88x9245 degrees by means of a phase shift circuit 5. The APC detection circuit 2 controls the VCO 6 such that the frequencies of the two signals input into it are the same and that the phase of the signal input from the VCO 6 is shifted from the phase of the input signal by xe2x88x9290 degrees. When this condition is satisfied, the signals input into the AM detector 1 will have same frequencies and phases. As a result, AM detection of the input signal becomes possible in the AM detector 1, and a desired waveform can be detected and output. The APC detection circuit 2 controls the VCO 6 such that the frequencies of the two signals input into it are same and that the phase of the signal input from the VCO 6 is shifted from the phase of the input signal by xe2x88x9290 degrees. When this condition is satisfied, the signals input into the AM detector 1 will have same frequencies and phases. As a result, AM detection of the input signal becomes possible in the AM detector 1, and a desired waveform can be detected and output.
However, in the conventional AM demodulation circuit using the PLL, a phenomenon that a detection reference signal is inverted in overmodulation of an input signal occurs. The principle behind the occurrence of this phenomenon will be described below with reference to FIG. 13A through FIG. 13C. FIG. 13A shows ideal output waveforms obtained in normal modulation and overmodulation. FIG. 13B shows an ideal output waveform obtained when the modulation signal is input. FIG. 13C is a diagram which shows an actual output waveform. It is assumed that signals input to the AM detector 1, i.e., the AM modulation signal and the input signal from the phase shift circuit 4 have equal frequencies and a phase difference of 180 degrees therebetween. When the phase difference is 180 degrees, a lower envelope is detected. For this reason, the waveform shown in FIG. 3B is output.
In FIG. 13A, a section which is finely hatched is a section in which the signals are shifted from each other by 180 degrees due to overmodulation. When the input signal is overmodulated and shifted by 180 degrees, the phase difference between two signals input to the APC detection circuit 2 are shifted by 180 degrees from original signals. At this time, since the APC detection circuit 2 controls the VCO 6 such that the relationship returns to the original phase relationship, the carrier wave of the input signal and a signal obtained by shifting the output from the VCO 6 by +45 degrees are shifted by 180 degrees from the signals having the desired phase relationship. Accordingly, as shown in FIG. 13C, the output from the AM detector is inverted.
Conventionally, in order to prevent the signals from being inverted, the following countermeasure is employed. That is, PLL control is stopped when there is overmodulation, or control speed is decreased to prevent signals from following the change in phase caused by overmodulation. However, an APC operation rarely functions in over modulation, so, when this scheme is employed, stability in the overmodulation is poor.
It is an object of this invention to provide an AM demodulation circuit which prevents an output in overmodulation from being inverted without stopping an APC operation in overmodulation.
The amplitude modulation demodulation circuit according to the present invention includes a first APC detection circuit which generates an APC detection signal of normal polarity from an amplitude modulation signal and APC detection reference signal, a second APC detection circuit which generates an APC detection signal of reverse polarity from an amplitude modulation signal and APC detection reference signal, and a switch which selects the APC detection signal of normal polarity in case of normal modulation and selects the APC detection signal of reverse polarity in case of overmodulation. As a result, APC detection is performed with a normal polarity in normal modulation, and APC detection is performed with an inverted polarity in overmodulation. Therefore, an AM demodulation circuit which prevents the output from being inverted in overmodulation without stopping an APC operation can be advantageously realized.
According to one aspect of the present invention, an APC filter is connected to the output terminal of a switch, a first APC detection circuit is connected to one of the input terminals of the switch, and a second APC detection circuit is connected to the other of the input terminals of the switch. The switch is controlled based on an AND signal between an output from a voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of the switch is selected in normal modulation and controls the switch by the AND signal such that the other of the input terminals of the switch is selected in overmodulation.
According to still another aspect of the present invention, an APC filter is connected to the output terminal of a switch, a first APC detection circuit is connected to one of the input terminals of the switch, and an inversion circuit and a second APC detection circuit are connected to the other of the input terminals of the switch. The switch is controlled based on an AND signal between an output from a voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of the switch is selected in normal modulation and controls the switch by the AND signal such that the other of the input terminals of the switch is selected in overmodulation.
According to still another aspect of the present invention, an APC detection circuit is connected to the output terminal of a switch, an AM modulation signal is connected to one of the input terminals of the switch, and an inverting circuit is connected to the other of the input terminals of the switch. The switch is controlled based on an AND signal between an output from a voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of the switch is selected in normal modulation and controls the switch by the AND signal such that the other of the input terminals of the switch is selected in overmodulation.
According to still another aspect of the present invention, an AM detector is connected to an output terminal of a first switch, a first phase shifter is connected to one of the input terminal of the first switch, and a second phase shifter is connected to the other input terminal of the first switch. An APC filter is connected to an output terminal of a second switch, a first APC detection circuit is connected to one of the input terminals of the second switch, and a second APC detection circuit is connected to the other of the input terminals of the second switch. The first and second switches are controlled based on an AND signal between an output from the voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of each of the first and second switches is selected in normal modulation and controls the first and second switches by the AND signal such that the other of the input terminals of each of the first and second switches is selected in overmodulation.
According to still another aspect of the present invention, a first phase shifter is connected to an input terminal of a first switch, an AM detector is connected to one of the output terminals of the first switch, and a APC detection circuit is connected to the other of the output terminals of the first switch. A second phase shifter is connected to an input terminal of a second switch, a APC detection circuit is connected to one of the output terminals of the second switch, and the AM detector is connected to the other of the output terminals of the second switch. The first and second switches are controlled based an AND signal between an output from the voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of each of the first and second switches is selected in normal modulation and controls the first and second switches by the AND signal such that the other of the input terminals of each of the first and second switches is selected in overmodulation.
According to still another aspect of the present invention, an APC detection circuit is connected to an output terminal of a switch, a second phase shifter is connected to one of the input terminals of the switch, and an inverting circuit is connected to the other of the input terminals of the switch. The switch is controlled based on an AND signal between an output from the voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of the switch is selected in normal modulation and controls the switch by the AND signal such that the other of the input terminals of the switch is selected in overmodulation.
According to still another aspect of the present invention, an AM detector is connected to an output terminal of a switch, a first phase shifter is connected to one of the input terminals of the switch, and an inverting circuit is connected to the other of the input terminals of the switch. The switch is controlled based on an AND signal between an output from the voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of the switch is selected in normal modulation and controls the switch by the AND signal such that the other of the input terminals of the switch is selected in overmodulation.
According to still another aspect of the present invention, an AM detector is connected to the output terminal of a switch, an AM modulation signal is connected to one of the input terminals of the switch, and an inverting circuit is connected to the other of the input terminals of the switch. The switch is controlled based on an AND signal between an output from the voltage comparator and a LOCK detection signal of a PLL such that one of the input terminals of the switch is selected in normal modulation and controls the switch by the AND signal such that the other of the input terminals of the switch is selected in overmodulation.
Moreover, the APC detection circuit may be connected to the output terminal of a third switch, the AM modulation signal may be connected to one of the input terminals of the third switch, and an output signal of a second phase shift circuit is connected to the other of the input terminals of the third switch.